The FPGA-Based FM Radio was created as a final project for my Digital Systems Designs w/ FPGAs class and as the name suggests was an implementation of an FM Radio’s system architecture onboard an FPGA. The input to the system were sinusoidal I and Q signals, and the output was audio data pertaining to the left and right channels.
The general process for this project is as follows:
FM radio architecture
Block diagram of IIR filter implemented in SystemVerilog
Synplify Premier synthesis results of the FM radio